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Project Feature: A Custom HAT for Analog I/O

Project Feature: A Custom HAT for Analog I/O

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Daryn Kono is a Vilros customer from Hawaii who built a custom HAT for his Raspberry Pi. This HAT provides Analog input and output capabilities to the Raspberry Pi board, allowing it to interface with other electronic devices more easily.

Q: Tell us about what you built - what components did you use?

I built a HAT board that is connected to the Raspberry Pi 40-pin connector. The board provides 4-channels of bipolar (+/-4.096V) 16-bit analog inputs and outputs via SMA RF connectors. The board uses power from the Raspberry Pi, in addition to SPI0 signals. The ADC is the MAX1303 and the DAC is the MAX5134 devices. 

Q: What was your inspiration for this project?

I needed a low cost digital controller with bipolar inputs/outputs. Using MATLAB/Simulink allowed me to model, simulate and implement the control systems, in addition to generating the digital controller coefficients. The architecture also allows usage as a data acquisition system, signal generator, digital filter, among other functions. The Raspberry Pi could also  be programmed with Python and C/C++ to interface with the analog I/O board via SPI, in lieu of MATLAB/Simulink tools. 

Q: What were some of the technical challenges you overcame?

First, finding a reasonable cost 16-bit bipolar ADC and DAC with SPI was a challenge. I believe reduced resolution ADC/DAC (14, 12 or 10-bit) could lower costs considerably. Second, the bipolar input/outputs required +/- voltages, whereas the Raspberry Pi provided only +3.3V and +5.0V. The solution was to use a charge pump to obtain -4.096V which may be cost effective but maybe not the best performance.       

Q: Do you have any tips or advice for people looking to work on a similar project?

The Raspberry Pi SPI signal generation has limitations with the maximum sample rates (time between SPI Chip Select/Enable). Depending on the number of channels used and the complexity of the digital algorithm, the sample rates may need to be reduced down to 1K samples/second or lower. Increasing the SPI clock frequency will help to reduce the latency or time required to read/write data, but does nothing to change the sample rate.
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